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VLSI IEEE 2018 Projects at Chennai

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Software defined radios (SDR) are wireless devices which support multiple communication standards via a reconfigurable hardware platform. Due to the high programming flexibility, performance and efficiency, Field Programmable Gate Array (FPGA) has been employed to implement the SDR devices for seamless communication across different modulation modes and codec schemes.

System generator is a design tool which provides Simulink blockset for model building and hardware co-simulation. Meanwhile, it allows the translation from the simulink design to other intermediate formats such as HDL or netlist files. Furthermore, these files can be used for hardware implementation in other design tools.

The objective of this study is to explore the feasibility to implement a Quadrature Phase Shift Keying (QPSK) transceiver on a Xilinx FPGA platform by using system generator tools. In this project, direct digital synthesizer will be utilized to construct the digital upconverter and downconverter.

A sequence generator will be designed to generate a pseudo random sequence for system testing. Moreover, the carrier recovery and timing synchronization will be examined.

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