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A VHDL/VERILOG MODEL OF A IEEE1451.2 SMART SENSOR:CHARACTERIZATION AND APPLICATIONS

INTRODUCTION

New sensors are required to be small, cheap, and smart. This project deals with intelligent sensors embedded in a single chip: a Verilog/VHDL model of an IEEE1451.2 Smart Sensor is proposed to obtain a portable STIM block suitable for customizable compact solutions and allowing low-cost, large-scale production. In order to evaluate performances of the proposed model, working prototypes have been built and some tests have been carried out in a real case (chemical detection sensors). The proposed Verilog/VHDL model has been compared with traditional, software-based, microcontroller solutions showing that a timing performance improvement greater than 50% can be obtained. Finally, to exemplify effectiveness of a portable VHDL model, a single-chip sensor with USB interface and integrated IEEE1451 structures has been realized and experimentally characterized. 

In this projectaper, IEEE 1451 Standards are considered. Nowadays, some vendors supply smart sensors adherent to IEEE1451.2, the standard part that describes Smart Transducer Interface Module (STIM), Transducer Electronic DataSheet (TEDS), and Transducer Independent Interface (TII). Generally, these sensors have a microprocessor-centered architecture, where the CPU is devoted both to handle sensing element signal and to support IEEE1451.2 structure .However, it is said that few commercial products (e.g., Telemonitor TMI931A) are currently supporting IEEE1451.2 because of its relatively high cost; actually vendors prefer IEEE1451.4 , a simpler and cheaper standard solution. It is suitable for analog transducers (e.g., ENDEVCO i-TEDS accelerometers), since it defines only TEDS and requires a small number of additional components. In order to obtain a fast and more compact system, the systemon-chip (SoC) approach can be pursued; C (microcontroller), conditioning electronics, and even sensors can be integrated in one chip, reducing overall cost and simplifying assembly procedures . 


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