Visit our new YouTube channel exclusively for Matlab Projects and Electrical Project @,YouTube-Matlab Projects YouTube-Electrical Projects

VLSI IEEE 2018 Projects at Chennai

Looking for VLSI 2018 Projects,Click Here or Contact @ +91 9894220795/+9144 42647783.For more details visit




Radar works by bouncing electromagentic energy off a target, recording the echo and making some useful ebservation from the data. A fudamental problem in radar is that the vast majority of the reflected energy does not make it back to the receiver. Much of the processing in a radar system is to improve the signal to noise ratio of the received signal and maximizing range accuracy to determine the position of the target with less error. Various techniques are avilable to the radar engineer for the design os high range rsolution system. These techniques may be categorized as simple pulse and pulse compression techniques. The simple pulse approach implies that the radar’s range resolution is determined by the transmit pulse’s duration. Higher power means better detection. The range resolution of radar is inversely proportional to the width of the transmitted pulse, so we desire to make the pulse as narrow as practical to obtain the best range resolution. Unfortunately narrowing the pulse means that the peak pulse power has to be increased to keep the total power constant. One approach to high resolution while maintaining high power is utilization of pulse compression waveforms. 


Digital signal processing is dominated by microprocessors with enhancements such as single cycle multiply-accumulate instructions and special addressing modes. Microprocessors are not fast enough for truly demanding DSP tasks. Algorithms optimized for these microprocessors based system do not map well into hardware. The advent of reconfigurable logic computers permits the higher speeds of dedicated hardware solution at costs that are competitive with the traditional software approach. Among these hardware-efficient algorithms is a class of iterative solutions for trigonometric and other transcendental functions that use only shifts and adds to perform. This trigonometric algorithm is called CORDIC. The trigonometric CORDIC algorithms were originally developed as a digital solution for real-time navigation problems 

CORDIC Theory :Analgorithm for vector rotation

CORDIC is an acronym for Coordinate Rotation Digital Computer. It is a hardware efficient algorithm, which belong to a class of iterative solutions that use only shifts and adds to perform a wide range of functions including certain trigonometric, hyperbolic, linear and logarithmic functions. CORDIC revolves around the idea of "rotating" the phase of a complex number, by multiplying it by a succession of constant values. however, the "multiplies" can all be powers of 2, so in binary arithmetic they can be done using just shifts and adds; no actual "multiplier" is needed. The CORDIC  algorithm provides an iterative method of performing vector rotation by arbitrary angles using only shifts and adds. The recursive equations used in CORDIC algorithm are, 

Xi+1 = Xi – Yi * di * 2-i
Yi+1 = Yi + Xi * di * 2 –i
Zi+1 = Zi – di * tan -1(2-i)
Where di = -1 if Zi is –ve
                 = +1 otherwise

to implement the above equations in FPGA’s using shifters and adders.

No comments: